Work

Area-Efficient Pipeline Architecture for Serial Real-Valued Fast Fourier Transform

Year: 2024

Type: article

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI: 10.1109/tvlsi.2024.3496922

Authors: Kun Li, Hongji Fang, Zhenguo Ma, Feng Yu, Bo Zhang, Qianjian Xing

Institution: Zhejiang University

Language: English

Topic: Digital Filter Design and Implementation

Subfield: Signal Processing

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4404688120

FWCI: 0.375

Cites: 19

Cited by: 2

Related to: 10