Work

High Quality Power-Aware Verification of Mixed Signal designs using UPF checkers

Year: 2024

Type: conference-paper

Source: International SoC Design Conference

DOI: 10.1109/isocc62682.2024.10762483

Authors: Gokul T, Ajay B S, Raveendranathreddy P

Institution: Intel (India)

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4404847793

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