Work

An SRAM-based Error-Free Time Domain Pulse Train Computing-In-Memory Macro achieving 226.14 TOPS/W and 5.782 TOPS/mm2

Year: 2024

Type: conference-paper

Source: International SoC Design Conference

DOI: 10.1109/isocc62682.2024.10762599

Authors: Edward Jongyoon Choi, Jiho Chun, Byeongseon Choi, Sohmyung Ha, Ik-Joon Chang, Minkyu Je

Institutions: Korea Advanced Institute of Science and Technology, New York University Abu Dhabi, Kyung Hee University

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: Samsung

OpenAlex ID: W4404848208

FWCI:

Cites: 7

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Related to: 10