Work

Design of 16-Kb 6T SRAM Supporting Wide Parallel Data Access for Enhanced Computation Speed

Year: 2024

Type: conference-paper

Source: International SoC Design Conference

DOI: 10.1109/isocc62682.2024.10762141

Authors: Jiwon Lee, Hyeonjun Cheon, Ho-Sung Lee, Ik-Hyeon Jeon, Joo-Hyung Chae

Institution: Kwangwoon University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4404848400

FWCI: 0.806

Cites: 2

Cited by: 1

Related to: 10