Work

A Resilient All-Digital PLL Using Ping-Pong Delay Line

Year: 2024

Type: conference-paper

Source: International SoC Design Conference

DOI: 10.1109/isocc62682.2024.10762153

Authors: Hsiang-Kai Teng, Shi-Yu Huang

Institution: National Tsing Hua University

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: Ministry of Science and Technology

OpenAlex ID: W4404848952

FWCI: 0.806

Cites: 3

Cited by: 1

Related to: 10