Work

Design of an Area-Efficient and Error-Reduced CMOS Approximate Adder

Year: 2024

Type: conference-paper

Source: International SoC Design Conference

DOI: 10.1109/isocc62682.2024.10762587

Authors: Novi Prihatiningrum, Jungu Kang, Chanyeong Choi, Yeongkyo Seo

Institution: Inha University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funders: National Research Foundation, IC Design Education Center

OpenAlex ID: W4404849705

FWCI: 1.612

Cites: 3

Cited by: 2

Related to: 10