Work

Transistor-Level Logic Gates Ranking Strategy for Selective Hardening

Year: 2024
Type: conference-paper
Authors: Glória D. Claro da Silva, Rafael B. Schvittz, Paulo F. Butzen
Language: English
Open Access status: closed
OpenAlex ID: W4404955177
FWCI: 0.781
Cites: 15
Cited by: 1
Related to: 10