Year: 2024
Type: conference-paper
Abstract: Legacy LoRa receiver adopts a superheterodyne architecture with a runtime power consumption of up to 100mW, resulting in its low-power promise can only be delivered in low duty-cycle mode. This paper presents Sisyphus as an ultra-low-power LoRa receiver, ensuring around-the-clock LoRa availability while extending battery life significantly. To achieve this, we propose a novel receiver design for passive coherent demodulation of LoRa. In this design, we creatively couple LoRa's down-conversion with de-chirping (dc2), leveraging the processing gain brought by chirp spread spectrum (CSS) modulation to boost communication range without the need for additional power supply. Moreover, we exploit the cyclical time-frequency feature intrinsic to LoRa for demodulation, and a low-power analog-digital signal processing circuit with negligible power is devised to replace the existing power-intensive sampling and costly digital computation. We prototype Sisyphus for proof-of-concept, and comprehensive experimental results demonstrate that Sisyphus can achieve significant power savings compared to legacy LoRa receiver while retaining the anti-interference ability of legacy LoRa. We envision that the design of Sisyphus can unlock the potential for broader applications of LoRa.
Authors: Han Wang, Yihang Song, Qianhe Meng, Zetao Gao, Chong Zhang, Li Lu
Language: English
Topic: IoT Networks and Protocols
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: bronze
Award: G2604267400
OpenAlex ID: W4405014811