Work

In-Memory Implementation of an Approximate Adder With Reduced Latency and Error

Year: 2024

Type: article

Source: IEEE Transactions on Circuits and Systems I Regular Papers

DOI: 10.1109/tcsi.2024.3511955

Authors: Vijaya Lakshmi, Vikramkumar Pudi, John Reuben

Institutions: Indian Institute of Technology Tirupati, Friedrich-Alexander-Universität Erlangen-Nürnberg

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4405520273

FWCI: 0.205

Cites: 43

Cited by: 2

Related to: 10