Work

FPGA-Based High-Performance Network Impairment Emulator

Year: 2024

Type: article

Abstract: With the rapid growth of Wide Area Networks (WANs) and advancements in 5G, cloud computing, and IoT, networks face higher demands for low cost, high capacity, reliability, and security. To ensure these requirements, network impairment emulators have become essential tools for testing and optimizing network performance under various conditions. This paper presents an FPGA-based Network Impairment Emulator (FNIE) that accurately emulates packet loss, reordering, and delay with high throughput and low cost. FNIE can achieve up to 100 Gbps throughput, with a configurable packet loss rate ranging from 0.001% to 100%, with a resolution as fine as 0.001%. It also supports up to 64 descriptor queues for reordering, a maximum reordering extent of 511, and emulates delays from 1 µs to 1 s.

Source: Electronics

DOI: 10.3390/electronics13244998

Authors: Dexuan Duan, Xinshuo Wang, Lin Li, Lei Liu

Institutions: Chinese Academy of Sciences, Institute of Acoustics, University of Chinese Academy of Sciences

Language: English

Topic: Network Packet Processing and Optimization

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: gold

Estimated APC paid: $2,728