Work

Implementation of A High Speed Layout Parallel Prefix Adder for Design Applications

Year: 2024

Type: conference-paper

Source: International Conference on Electronics, Communication and Aerospace Technology (ICECA)

DOI: 10.1109/iceca63461.2024.10800816

Authors: D. V. N. Bharathi, Y. Varthamanan

Institution: Sathyabama Institute of Science and Technology

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4405755055

FWCI: 0.806

Cites: 21

Cited by: 1

Related to: 10