Work

Design and Synthesis of State Transition Graph-Based Sequential Multiplier for Fast Computing Operation

Year: 2024

Type: conference-paper

Source: Odisha International Conference on Electrical Power Engineering, Communication and Computing Technology (ODICON)

DOI: 10.1109/odicon62106.2024.10797535

Authors: Sandipan Pine, Rajesh Sharma R, Rahul Adhikary, Satyasis Mishra, Akey Sungheetha, G S Pradeep Ghantasala

Institutions: Centurion University of Technology and Management, Alliance University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4405756218

FWCI: 0.781

Cites: 15

Cited by: 1

Related to: 10