Work

A Scalable, Multi-Core, Multi-Function, Integrated CMOS/Memristor Sensor Interface for Neural Sensing Applications

Year: 2024

Type: article

Abstract: This paper presents the architecture, design, and testing results of a scalable, multi-core, multi-function sensor interface, integrating CMOS technology and memristor elements for efficient neuromorphic and bio-inspired analysis. The architecture leverages the high-density and non-volatile properties of memristors to support different analysis functions. Each processing core is equipped with hybrid CMOS/memristor arrays, enabling real-time parallel acquisition and analysis, and each can be configured independently. The system facilitates communication between cores and is fully scalable. The first implementation supports 16 input channels, storing 256 neural signal samples, and the second implementation supports 576 input channels, storing 9k neural signal samples.

Source: Electronics

DOI: 10.3390/electronics14010030

Authors: Grahame Reynolds, Xiongfei Jiang, Shiwei Wang, Alex Serb, Spyros Stathopolous, Themis Prodromakis

Institution: University of Edinburgh

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: gold

Estimated APC paid: $2,728

Funders: Royal Society, Engineering and Physical Sciences Research Council