Work

Interactive Analog IC Layout Tool with Real-time Parasitic-aware Automatic Routing Assistance

Year: 2024

Type: conference-paper

Source: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

DOI: 10.1109/apccas62602.2024.10808823

Authors: Yu-Tzu Chen, Chin-Fu Nien, Chin Hsia, Chung-Yi Li

Institutions: Chang Gung University, National Yang Ming Chiao Tung University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: National Science and Technology Council

OpenAlex ID: W4405845240

FWCI: 1.56

Cites: 20

Cited by: 2

Related to: 10