Work

Enumeration of Genaralized Parallel Counters for Multi-Input Adder Synthesis for FPGAs

Year: 2024

Type: conference-paper

Source: IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

DOI: 10.1109/apccas62602.2024.10808619

Authors: Mugi Noda, Nagisa Ishiura

Institution: Kwansei Gakuin University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4405846187

FWCI: 0.779

Cites: 9

Cited by: 1

Related to: 10