Work

Design of High-Speed Multipliers using Counter based 4:2 Compressor with Pre-Processing

Year: 2024

Type: conference-paper

DOI: 10.1109/icitee62483.2024.10809008

Authors: Pavitra Y J, Mahanta Talakal

Institution: PES University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4405846274

FWCI:

Cites: 16

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Related to: 10