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Switching Loss Reduction with Commutation Loop Layout Optimization for GaN Devices with Low Output Capacitance

Year: 2024

Type: conference-paper

Source: IEEE Design Methodologies Conference (DMC)

DOI: 10.1109/dmc62632.2024.10812171

Authors: Jannik Maier, Burkhard Ulrich, Philipp Czerwenka, Eckhard Hennig, Gernot Schullerus

Institution: Reutlingen University

Language: English

Topic: Silicon Carbide Semiconductor Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4405908412

FWCI:

Cites: 9

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Related to: 10