Work

Design of Hierarchical Cache With Hybrid SOT- and STT-MRAM in Multi-Core CPU Environments

Year: 2024

Type: article

Source: IEEE Transactions on Magnetics

DOI: 10.1109/tmag.2024.3524579

Authors: Yulei Dai, Yanfeng Jiang

Institution: Jiangnan University

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4405935280

FWCI: 0.641

Cites: 23

Cited by: 2

Related to: 10