Work

Pattern Generated Counter With Variable Step Size

Year: 2024

Type: conference-paper

DOI: 10.1109/csitss64042.2024.10816743

Authors: Chaitrashree S, Gaurav C, Kiran Kumar J Purad, Prathap C, Shylashree N

Institution: R.V. College of Engineering

Language: English

Topic: Embedded Systems and FPGA Applications

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4405974484

FWCI:

Cites: 14

Cited by:

Related to: 10