Heterogeneous monolithic complementary thin-film transistor with n-channel polycrystalline-silicon and upper p-channel double-gate polycrystalline-germanium thin-film transistors on a glass substrate
Year: 2025
Type: article
Abstract: In this study, we developed a heterogeneous and monolithic complementary thin-film transistor (CTFT) on a glass substrate. The design integrates an n-channel (n-ch) top gate (TG) polycrystalline-silicon (poly-Si) thin-film transistor (TFT) on the bottom layer with a p-channel (p-ch) double-gate (DG) polycrystalline-germanium (poly-Ge) TFT on the upper layer. The poly-Si layer was crystallized through continuous-wave laser lateral crystallization, whereas the DG poly-Ge TFT on the upper layer was fabricated using metal-induced crystallization at 500 °C, employing copper as a catalyst. The inverter operation exhibited a transition voltage of 0.9 V at VDD = 4.0 V, aligning with theoretical predictions. During the dynamic operation of the CMOS inverter, the pull-up delay time was longer than the pull-down delay. This delay disparity is attributed to the lower on-current of the p-ch poly-Ge TFT. Potential enhancements include employing a multilayered p-ch poly-Ge TFT or incorporating germanium-tin (Ge1−x Sn x ) as the channel material.
Authors: Yuto Ito, Daiki Goshima, Akito Kurihara, Akito Hara
Institution: Tohoku Gakuin University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Estimated APC paid: $2,210
OpenAlex ID: W4406206619