Work

A 24-Gb/s PAM-4 Tailless Current-mode Driver with Output Impedance Enhancing Technique in 14-nm FinFET

Year: 2024

Type: article

Source: JSTS Journal of Semiconductor Technology and Science

DOI: 10.5573/jsts.2024.24.6.540

Authors: Yunseong Jo, Jaeduk Han

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4406406091

FWCI: 0.104

Cites:

Cited by: 1

Related to: 10