Noise-Aware Circuit Clustering based on Analytical Placement Evolution
Year: 2024
Type: conference-paper
Abstract: Clustering is a critical step in VLSI design. Good clusters can aid in partitioning, floorplanning, and netlist reduction. In this work, we adopt a data mining technique to extract modular clusters and networks between clusters from placement evolution. We observe that state-of-the-art analytical placers propagate standard cells as Modular Clusters during placement evolution. And other noisy cells, which cannot be assigned to a specific cluster, form a network structure called Inter-Cluster Networks (ICNs). We propose Cascade HDBSCAN to extract Modular Clusters at different granularity as well as Inter-Cluster Networks in placement evolution. And we reveal Modular Clusters and Inter-Cluster Networks adhere to different Rent's rules. Furthermore, we provide a detailed analysis on the clustering structure and demonstrate VLSI netlists are small-world networks. Modular Clusters are localized groupings connected by Inter-Cluster Networks that function as shortcuts in the networks.
Authors: Zhiyuan Chen, Chung-Kuan Cheng, Zhan Song, Yucheng Wang
Institution: University of California San Diego
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
OpenAlex ID: W4406758769