Work

22-nm Data Backup SRAM Using 3.3V IO MOSs with Ultralow-Voltage-Drop Erasure Technique for Secure IoT Applications

Year: 2024

Type: conference-paper

Source: IEEE Asian Solid-State Circuits Conference (A-SSCC)

DOI: 10.1109/a-sscc60305.2024.10848623

Authors: Daiki Kitagata, Shunya Nagata, Kouji Satou, Daisuke Nakamura, Koji Tanaka, Miki Tanaka

Institution: Renesas Electronics (Japan)

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4406894569

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