Work

A Power-Efficient VLSI Multiplier Design Employing Radix-2m Squarer Unit and Adder Compressor

Year: 2024

Type: conference-paper

Source: IEEE International Conference on Electronics, Circuits and Systems (ICECS)

DOI: 10.1109/icecs61496.2024.10849254

Authors: Leonardo Antonietti, Morgana Da Rosa, Rodrigo Lopes, Eduardo Da Costa, Rafael Soares

Institutions: Universidade Federal de Pelotas, Universidade Católica de Pelotas

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4406894903

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