Work

A 860mV and 73.5Ppm/°C Voltage Reference that Relies on Back-Gate Biasing Techniques in 28nm FD-SOI Technology

Year: 2024

Type: conference-paper

Source: IEEE International Conference on Electronics, Circuits and Systems (ICECS)

DOI: 10.1109/icecs61496.2024.10849174

Authors: Maxime Guillot, Yann Deval, Hervé Lapuyade, François Rivet

Institutions: Centre National de la Recherche Scientifique, Université de Bordeaux, Laboratoire de l'Intégration du Matériau au Système, Institut Polytechnique de Bordeaux

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4406895036

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