A 0.036mm 2 80Mb/s-to-15.96Gb/s C-PHY and D-PHY Combo Receiver with Background Calibrations in 4nm FinFET
Year: 2024
Type: conference-paper
Authors: Woongki Min, Soomin Lee, Taejin Jang, Yunsik Jo, Hyoungjoong Kim, Younggyun Oh, Myeong-Cheol Kim, Hyeonji Han, Cheolhwan Lim, Seungjun Lee, Jihoon Lee, Yon Jun Shin, Sangho Kim, Jongwoo Lee
Institution: Samsung Electronics (South Korea)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4406895043