Work

Pruning Boolean d-DNNF Circuits Through Tseitin-Awareness

Year: 2024

Type: conference-paper

Abstract: Boolean circuits in d-DNNF form enable tractable probabilistic inference. However, as a key insight of this work, we show that commonly used d-DNNF compilation approaches introduce irrelevant subcircuits. We call these subcircuits Tseitin artifacts, as they are introduced due to the Tseitin transformation step – a well-established procedure to transform any circuit into the CNF format required by several d-DNNF knowledge compilers. We discuss how to detect and remove both Tseitin variables and Tseitin artifacts, leading to more succinct circuits. We empirically observe an average size reduction of 77.5% when removing both Tseitin variables and artifacts. The additional pruning of Tseitin artifacts reduces the size by 22.2% on average. This significantly improves downstream tasks that benefit from a more succinct circuit, e.g., probabilistic inference tasks.

Source: Proceedings - International Conference on Tools with Artificial Intelligence, TAI

DOI: 10.1109/ictai62512.2024.00099

Author: Vincent Derkinderen

Institution: KU Leuven

Language: English

Topic: Bayesian Modeling and Causal Inference

Subfield: Artificial Intelligence

Field: Computer Science

Domain: Physical Sciences

Open Access status: green

Funder: H2020 European Institute of Innovation and Technology

Award: G3788673671