Work

pulse: Accelerating Distributed Pointer-Traversals on Disaggregated Memory

Year: 2025

Type: conference-paper

Abstract: Caches at CPU nodes in disaggregated memory architectures amortize the high data access latency over the network. However, such caches are fundamentally unable to improve performance for workloads requiring pointer traversals across linked data structures. We argue for accelerating these pointer traversals closer to disaggregated memory in a manner that preserves expressiveness for supporting various linked structures, ensures energy efficiency and performance, and supports distributed execution. We design pulse, a distributed pointer-traversal framework for rack-scale disaggregated memory to meet all the above requirements. Our evaluation of pulse shows that it enables low-latency, high-throughput, and energy-efficient execution for a wide range of pointer traversal workloads on disaggregated memory that fare poorly with caching alone.

Source: ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)

DOI: 10.1145/3669940.3707253

Authors: Yupeng Tang, Seung-seob Lee, Abhishek Bhattacharjee, Anurag Khandelwal

Institution: Yale University

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: hybrid

Funders: National Science Foundation, NetApp

Awards: RINGS: Intelligent and Resilient Virtualization of Massive MIMO Physical Layer, CAREER: In-Network Memory Management for Disaggregated Datacenters, AI Institute for Edge Computing Leveraging Next Generation Networks (Athena), PPoSS: Planning: High-Performance Certified Trust for Global-Scale Applications