Year: 2025
Type: article
Abstract: This comprehensive article explores Static Timing Analysis (STA) as a fundamental methodology in modern digital design verification, focusing on its evolution, implementation, and future directions in nanometer-scale semiconductor designs.The article delves into the comparative advantages of STA over traditional simulation methods, analyzing its impact on design verification efficiency and reliability.The
Author: Bharati Guvvala
Institution: SRM University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: diamond
OpenAlex ID: W4407276103
