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Porting Lattice QCD benchmark to upcoming STX stencil/tensor accelerator

Year: 2025

Type: conference-paper

Abstract: Developed under the European Processor Initiative (EPI), the STX stencil/tensor accelerator aims to achieve a 5-10x higher energy efficiency over general purpose compute units. The architecture consists of specialized MIMD compute units which are supported and controlled by RISC-V cores. We describe a co-design effort between hardware, software, and application development focused around porting a LQCD benchmark to this new architecture.

Source: International Symposium on Lattice Field Theory (LATTICE)

DOI: 10.22323/1.466.0451

Authors: Simon Schlepphorst, Stefan Krieg

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: hybrid

Funders: Deutsche Forschungsgemeinschaft, Bundesministerium für Bildung und Forschung

Award: PUNCH4NFDI Teilchen, Universum, Kerne und Hadronen für die NFDI

OpenAlex ID: W4407338783

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