Work

Reliability Study of Interface Traps in Gate-All-Around Tunnel FET: A TCAD Simulation Approach

Year: 2024

Type: conference-paper

Source: IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)

DOI: 10.1109/edkcon62339.2024.10870811

Authors: Rittik Ghosh, A. Provias, Tathagata Sau, Pragya, Saheli Sarkhel, Priyanka Saha

Institutions: TU Wien, Netaji Subhash Engineering College, Intel (India), C.V. Raman Global University

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4407466350

FWCI:

Cites: 11

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Related to: 10