Work

Performance Analysis of 8/16/32-bit Calculator Using Verilog and System Verilog

Year: 2024

Type: conference-paper

Source: International Conference on Ubiquitous Computing and Intelligent Information Systems (ICUIS)

DOI: 10.1109/icuis64676.2024.10867037

Authors: M. Saravanan, J. Saritha, S.Sree Vishnu Varthini, R.Sri Sathya Priya, R.Sri SivaSakthi, Shiromani Balmukund Rahi

Institutions: Sri Eshwar College of Engineering, Gautam Buddha University

Language: English

Topic: Numerical Methods and Algorithms

Subfield: Computational Theory and Mathematics

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4407475804

FWCI: 5.949

Cites: 10

Cited by: 9

Related to: 10