Development of methodology and implementation of SoC-based compact single-board validation system for the ATLAS Phase-II level-0 muon trigger system
Year: 2025
Type: article
Abstract: Firmware testing on actual hardware is an optimal way to validate large-scale FPGA-based trigger/DAQ systems. For the Phase-II level-0 muon trigger system at the ATLAS experiment, a methodology using prototype ATCA-based Sector Logic (SL) boards was developed, featuring self-complete DAQ, high-statistics test patterns, and various nature of input test data. The design exploits Zynq SoC on the board for control, injection of BRAM-based test patterns data and flexible DAQ to probe the process. This success is thanks to the flexibility of the SL board design around the SoC device. This methodology facilitates precise firmware validation and systematic debugging.
Source: Journal of Instrumentation
Author: Yoshifumi Narukawa
Institution: The University of Tokyo
Language: English
Subfield: Control and Systems Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W4407528741