Work

Design Implementation of Synchronous FIFO-Synthesis, PNR, STA and Physical Verification

Year: 2024

Type: conference-paper

DOI: 10.1109/isense63713.2024.10872036

Authors: Athira J Shenoy, Archa P B, Adersh V R

Institution: College of Engineering Trivandrum

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4407639592

FWCI: 5.642

Cites: 13

Cited by: 7

Related to: 10