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Implementation of 256-Bit AES and SHA3 on FPGA
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Details
Locations
Year:
2024
Type:
conference-paper
Source:
International Conference on Mobile Networks and Wireless Communications (ICMNWC)
DOI:
10.1109/icmnwc63764.2024.10871961
Authors:
Ambaprasad N,
Amogh R,
Ravikumar K,
Sachin,
Madhura R,
Shashidhar R
show all 6
Institutions:
Dayananda Sagar College of Engineering,
JSS Science and Technology University
Language:
English
Topic:
Cryptographic Implementations and Security
Subfield:
Artificial Intelligence
Field:
Computer Science
Domain:
Physical Sciences
Open Access status:
closed
OpenAlex ID:
W4407788139
FWCI:
0.633
Cites:
15
Cited by:
2
Related to:
10