Energy-aware Application Mapping onto 3D Mesh-Based Network-on-Chip using Heuristic Mapping Algorithms
Year: 2025
Type: article
Abstract: Network-on-chip (NoC) architectures have emerged as a potential solution for facilitating communication between processing elements (PEs) in modern multi-core systems. The design and optimization of NoC architectures are critical for achieving efficient communication, reduced energy consumption, and improved overall system performance. In this study, we investigate and compare the performance of two prominent optimization algorithms, like Genetic Algorithm (GA) and CastNet Algorithm, for 2D and 3D mesh NoC architectures. The study’s objective is to estimate these algorithms’ effectiveness in optimizing communication cost, communication energy, and CPU run time in both 2D and 3D mesh NoC architectures. Performance metrics such as communication cost, communication energy consumption, and CPU run time are measured and compared between the two algorithms and carried out on real and custom benchmark applications like MWD, VOPD and MPEG4.
DOI: 10.3897/jucs.123539
Authors: Kiran K A, Jaison Jacob
Institution: APJ Abdul Kalam Technological University
Language: English
Subfield: Computer Networks and Communications
Field: Computer Science
Domain: Physical Sciences
Open Access status: diamond
OpenAlex ID: W4407796605