Thermal Stress Analysis and Key Influencing Factors for the EMIB in Chiplet Packaging
Year: 2025
Type: article
Abstract: This study presents a comprehensive thermal stress analysis of critical components in an embedded multi-die interconnect bridge (EMIB) within a chiplet package using finite element analysis (FEA). We systematically evaluated key design parameters—including bump diameter-to-pitch ratios, bump distribution patterns, EMIB thickness, number of EMIBs, and aspect ratios—to assess their impact on stresses. An ABAQUS-based FEA model was used to simulate thermal loading with a 165 °C temperature increase. The results indicate that a bump diameter-to-pitch ratio of 0.3 optimizes stress distribution, while a peripheral bump arrangement is superior in stress reduction compared to other patterns. Thinner EMIBs linearly reduce maximum principal stress, whereas multiple EMIBs and aspect ratio variations have minimal effects. These findings offer practical guidelines for optimizing EMIB design in chiplet packages, emphasizing the importance of bump geometry, distribution patterns, and EMIB thickness for improved reliability.
Source: Integrated Circuits and Systems
Authors: Yan Zhou, Jun Wang
Institution: Fudan University
Language: English
Topic: 3D IC and TSV technologies
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Award: G18013425
OpenAlex ID: W4408164170