Work

Enhancing the Readout Speed of NP-H-CAM Using Clocked CMOS Inverters

Year: 2024

Type: conference-paper

Source: IEEE Region 10 Conference (TENCON)

DOI: 10.1109/tencon61640.2024.10902779

Authors: Hisaya Sawada, Hirotaka Furukawa, Naruaki Hokari, Daishi Nishiguchi, Yujiro Harada, Masaaki Fukuhara

Institutions: Tokai University, National Institute of Technology, Kurume College

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funders: Cadence Design Systems, Mentor Graphics, University of Tokyo, Japan Society for the Promotion of Science

Award: A Study on a Low Power Variable Logic Circuit Using Neuron CMOS Inverters

OpenAlex ID: W4408258374

FWCI:

Cites: 7

Cited by:

Related to: 10