Work

A Novel Embedded Drain Dual‐Gate Tunnel Field Effect Transistor with Drain Dielectric Pocket for Suppressing Ambipolar Effect

Year: 2025

Type: article

Abstract: This work investigates the influence of embedding the drain into the channel and adding a dielectric pocket (DP) layer at the interface between the drain and the channel of double‐gate silicon tunnel field effect transistor (TFET; DP‐HD‐HJ‐DGTFET) on the device performance. DP can inhibit the point tunneling in the channel region, thus suppressing the ambipolar behavior of the device. The characteristics of this device, such as on‐state current (Ion), average subthreshold swing (SS), ambipolar current (IAmb), Ion/IAmb ratio, are emphatically analyzed. The results are compared with those of traditional double‐gate TFET (DGTFET) and SiGe/Si heterojunction TFET with hetero‐gate‐dielectric (HD‐HJ‐DGTFET) to prove its superiority. In addition, the influence of the length (Lp), thickness (Tp) of the DPs, the thickness of the drain region (Td) and different dielectric materials on the performance of the DP‐HD‐HJ‐DGTFET devices is investigated. Simulation results demonstrate that under the optimized conditions, the DP‐HD‐HJ‐DGTFET exhibits a lower IAmb of 1.49 × 10−13 A μm−1, higher Ion/IAmb ratio of 1.8 × 108, and lower SS of 20 mV decade−1. Finally, the gate‐drain capacitance (Cgd), transconductance (gm), cutoff frequency (ft), and gain bandwidth product of the device are also investigated to understand its radio frequency performance.

Source: physica status solidi (a)

DOI: 10.1002/pssa.202400946