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Process Development of Twin 2 Die Stack Modules for Deep Learning Hardware Accelerator

Year: 2024

Type: conference-paper

Source: IEEE Electronics Packaging Technology Conference (EPTC)

DOI: 10.1109/eptc62800.2024.10909777

Authors: Ser Choong Chong, Xiangyu Wang, Sharon Lim Pei Siang, Ling Xie

Institutions: Agency for Science, Technology and Research, Institute of Microelectronics

Language: English

Topic: 3D IC and TSV technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4408324921

FWCI:

Cites: 5

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Related to: 10