Work

FPGA and GDS II Performance Comparison of Chess Clock Design

Year: 2024

Type: conference-paper

Source: IEEE International Women in Engineering (WIE) Conference on Electrical and Computer Engineering (WIECON-ECE)

DOI: 10.1109/wiecon-ece64149.2024.10914774

Authors: Vaishali Dhare, Usha Mehta, Vaibhavi Tiwari

Institution: Nirma University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4408400760

FWCI:

Cites: 6

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Related to: 10