Analysis of Nanoscale Short Channel Effects in Cylindrical Gate-All-Around Junctionless FETs and Performance Enhancement with GaAs and III–V Materials for Low-Power, High Frequency Applications
Year: 2025
Type: article
Abstract: With the advancement of the semiconductor industry into the sub-10 nm regime, high-performance, low-energy transistors have become important, and gate-all-around junctionless field-effect transistors (GAA-JLFETs) have been developed to meet the demands. Silicon (Si) is still the dominant semiconductor material, but other potential alternatives like gallium arsenide (GaAs) provide much higher electron mobility, improving the drive current and switching speed. In this study, our contributions are a comparative analysis of Si and GaAs-based cylindrical GAA-JLFETs, using threshold voltage behavior, electrostatic control, short channel effects, subthreshold slope, drain-induced barrier lowering, and leakage current as the metrics in the evaluation of performance. A comprehensive analytical modeling approach is employed, solving Poisson's equation and utilizing numerical simulations to assess device characteristics using the ATLAS SILVACO tool under varying channel lengths and gate biases. Comparisons between Si and GaAs-based devices show what trade-offs exist and what the material engineering strategies are to use the advantages of GaAs and reduce some disadvantages. The results from the study are a valuable contribution to the design and optimization of next-generation FET architectures, pointing the direction for enabling next-generation beyond CMOS technology.
Source: Electronics
Authors: Pooja Srivastava, Aditi Upadhyaya, Shekhar Yadav, C. M. S. Negi, Arvind Kumar Singh
Institutions: Banasthali University, Banaras Hindu University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,896
Funder: Banaras Hindu University
OpenAlex ID: W4408405128