Work

RTL design of 16-bit RISC Processor Using Vedic Mathematics

Year: 2024

Type: conference-paper

Source: Proceedings - Asian Test Symposium/Proceedings

DOI: 10.1109/ats64447.2024.10915250

Authors: Madhura R, Peram Varshitha, Nikitha S, Niveditha K M, Mayuri Bhat K

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4408442714

FWCI: 0.806

Cites: 7

Cited by: 1

Related to: 10