Work

Root cause of read after delay in ferroelectric memories

Year: 2025

Type: article

Abstract: Accelerated margin loss during read after delay (RAD) is a newly discovered reliability concern in HfO 2 -based ferroelectric random access memories (FeRAMs), which significantly impacts the lifetime of the memory device. Unlike conventional fatigue effect, this issue is closely linked to the coercive field ( E c ) shift, or imprint, during bipolar electrical field cycling at intermediate frequency. The precise cause of imprint during RAD, however, remains elusive. To investigate, we employed customized electrical testing to examine the charge transfer behavior in static imprint (SI) and continuous read/write (CRW) scenarios, which can be viewed as RAD performed at minimum and maximum frequencies. Our findings reveal that interfacial charge injection is the primary mechanism for imprint in SI, while bulk charge drives the imprint in asymmetric CRW. Further exploration with a SPICE-based charge transfer model suggests that RAD-related imprint is the result of bulk charge migration, driven by the periodically restored depolarization field after read/write-back operation. Experimental verification supports this theory, highlighting the importance of interface engineering to enhance bound charge screening and element doping to elevate the migration barrier for bulk charges in addressing the RAD problem. • The root cause of RAD, a newly discovered failure mode in FeRAM, is investigated through the combination of customized electrical test and a SPICE-based charge transfer model. • It is discovered that imprint during RAD is the result of bulk charge migration driven by the periodically restored depolarization field during read/write-back operations, which is verified by both experiment and modeling results. • This newly discovered mechanism highlights the importance of interfacial engineering and increase of charge migration barrier through bulk doping to effectively suppress the degradation of MW in FeRAM during RAD.

Source: Chip

DOI: 10.1016/j.chip.2025.100139