Design and Implementations of LUT based Approximate Adders for FPGAs
Year: 2024
Type: conference-paper
Authors: Murthy C, Madhusudhan K N, Smt. Harshitha B
Institution: B.M.S. College of Engineering
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4408703520