Work

SystemVerilog Based Design of an RV32I Compliant RISC-V Processor Core

Year: 2024

Type: conference-paper

Source: IEEE Global Conference for Advancement in Technology (GCAT)

DOI: 10.1109/gcat62922.2024.10923874

Authors: Abhinav Rajyan, Gaurav Saini

Institution: National Institute of Technology Kurukshetra

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4408717183

FWCI: 0.932

Cites: 10

Cited by: 3

Related to: 10