Work

Analysis of Low Power Approximate 128x128 bit Vedic Multiplier for Existing Real World FPGAs

Year: 2024

Type: conference-paper

Source: IEEE Global Conference for Advancement in Technology (GCAT)

DOI: 10.1109/gcat62922.2024.10924019

Authors: Kamatchi S, Hemanth Prasad N

Institution: Amrita Vishwa Vidyapeetham

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4408717275

FWCI: 1.557

Cites: 14

Cited by: 2

Related to: 10