Compiler-aware AI Hardware Design for Edge Devices
Year: 2025
Type: conference-paper
Abstract: The adoption of novel AI hardware is often hindered by the lack of available deployment solutions. To address this challenge, multi-target deep learning (DL) compilers have emerged, offering a large variety of optimizations and automated deployment solutions that bridge the gap between AI software and hardware. However, support for dedicated AI accelerators remains limited due to their vast architectural differences and unique characteristics.
Institution: University of Tübingen
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: gold
OpenAlex ID: W4409001572
