Work

Impact-Ionization-Based High-Endurance One-Transistor Bulk CMOS Cryogenic Memory

Year: 2025

Type: article

Abstract: This paper presents a high-endurance capacitorless one-transistor (1T) cryogenic memory, fabricated in a 180 nm bulk CMOS technology, with a high memory window of ($10{^{{7}}}~I_{1}$/$I_{0}$sense current ratio) and prolonged retention. The memory is enabled by the bistable$I_{D}$–$V_{G}$transistor characteristics due to impact ionization (II) at cryogenic temperatures (T$\approx ~45$ns at T$10^{9}$cycles while maintaining the$I_{1}$/$I_{0}$memory window. Retention times of >10 s with a 30x memory window were observed in extensive high-speed measurements. The fast switching and retention characteristics combine to yield a low power ($\mu $W-range) candidate for local cache memory to support quantum sensing or quantum computing control circuitry. Additionally, our study outlines essential measurements crucial for exploring the viability of alternative memory solutions for low-temperature quantum sensing and computation applications.

Source: IEEE Journal of the Electron Devices Society

DOI: 10.1109/jeds.2025.3552036

Authors: Pragya R. Shrestha, Alexander Zaslavsky, Valery Ortiz Jimenez, Jason P. Campbell, Curt A. Richter

Institutions: National Institute of Standards and Technology, Physical Measurement Laboratory, Brown University

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: gold

Estimated APC paid: $1,350

Funders: National Science Foundation, National Institute of Standards and Technology