Work

Comparative Analysis of Performance Factors of an 8-bit SIPO Shift Register using JK Flip-Flop with a Very Low Dynamic Power and High Noise Margin

Year: 2024

Type: conference-paper

Source: International Conference on Innovations in Science, Engineering and Technology (ICISET)

DOI: 10.1109/iciset62123.2024.10939821

Authors: Jabala Nur Fahima, Kayes Hasan, Safin Ahmed Suvo, Md. Tanvir Hossan, Richard Victor Biswas, Muhibul Haque Bhuyan

Institutions: American International University-Bangladesh, University of California, Los Angeles

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4409060354

FWCI:

Cites: 18

Cited by:

Related to: 10